1. Field of the Invention
The present invention relates to bus arbitration and in particular relates to methods and structure associated with arbitration in a bus bridge or multiported slave device coupled to multiple buses for preserving lock signals generated by master's on multiple buses.
2. Discussion of Related Art
It is generally known in the digital electronics arts that multiple devices exchange information with one another over an electronic bus structure connecting the multiple devices. In general, a first device, typically referred to as a master device, initiates the exchange of information with a second device, typically referred to as a slave device. Where a particular bus architecture supports multiple master devices, it is generally known in the art that the bus structure and/or devices coupled thereto include arbitration features to select among multiple master devices simultaneously requesting use of the bus for exchange of information with one or more slave devices. Arbitration grants temporary exclusive control of the shared bus to one of multiple simultaneous requesting master devices on the bus. Arbitration, in general, is initiated by one or more master devices issuing a request for the shared bus indicating a need for temporary exclusive control of the bus. A bus grant signal corresponding to a requesting master device is eventually returned to the requesting master device by the arbitration logic (arbiter) indicating granting of the requested temporary exclusive control of the shared bus structure. The requesting master devices then performs the desired exchange of information with identified a slave devices and eventually relinquishes its temporary exclusive control of the bus by releasing its bus request signal or through other indicia appropriate to the particular bus structure. Arbitration logic of the bus structure is then free to receive further bus requests and grant temporary exclusive control of the shared bus to other requesting master devices. The sequence of requesting the bus, granting the bus, exchanging desired information over the bus and relinquishing control of the bus is often referred to as a “transaction” or “bus transaction.”
Similar arbitration considerations also apply to systems where multiple buses are coupled together through a device usually referred to as a “bus bridge.” Still further, there are slave devices that are multi-ported such that the device itself is capable of being coupled directly to multiple buses. For example, a memory controller may be such a multi-ported slave device. The memory controller may attach to a plurality of buses, each bus having one or more master devices coupled thereto for purposes of exchanging information with the memory devices managed by the memory controller. The various master devices each initiate bus transactions to exchange data with the memory devices through the slave memory controller.
In some bus architectures, it is common for master devices to assert a lock signal indicating that the particular sequence of transactions being performed is to exclude other requests through the entire sequence of transactions. Where normally an arbitration element will grant a new request to another requesting master device as soon as an earlier bus transaction completes, the lock protocol indicates that the bus is to be retained by the current master device until an entire sequence of transactions is completed. For example, such locking protocols and structures are common where a master device requires temporary exclusive control of a slave device for purposes of performing a read-modify-write sequence of bus transaction. Such a sequence of transactions requires that the master device and slave device(s) remain in communication through multiple bus transactions where a value is read (returned to the master), modified by the master device and returned to the slave (written back to the slave) all as an atomic, uninterrupted sequence of bus transactions. In such a sequence it may be critical that the slave device exchange information exclusively with a single bus master regardless of the number of buses coupled to the slave device or coupled to a bus bridge device. A lock is used to assure such atomicity for a sequence of related bus transactions.
It is presently a problem in the art to preserve such locking bus requests where multiple buses are coupled to one or more slave devices through a bus bridge or coupled to a multiported slave device. In one particular exemplary system, an AMBA AHB bus architecture supports multiple AHB buses to be coupled through a common bus bridge or to be coupled to a multiported slave device. Such techniques and structures are supported in for example, AHB, AHB-Lite and Multilayer AHB bus architectures.
In general, in such architectures, each bus is coupled to the bus bridge or multiported slave device through a “port” of the bridge or multiported device. The bridge or multiported device therefore has multiple ports from which it selects a next port for transactions with the common, shared device. As used herein, “multiported device” or “multiported slave device” refers to any multiported device including, for example, a bus bridge circuit and a multiported slave device such as a memory controller having multiple ports for access to the shared memory.
Each bus coupled to a multiported device includes features to arbitrate for temporary exclusive control of the bus among the various master devices coupled to the bus. This bus arbitration selects a next requesting master device to receive temporary exclusive control of the corresponding bus. In turn, each bus is coupled to a port of the multiported device and requests access to the multiported device. The multiported device in like manner arbitrates among its various ports to select a next bus on which a master device is requesting access to the shared, multiported device. Arbitration techniques to select a port within the multiported device are similar to those used by each bus coupled to the multiported device.
In some bus architectures a device may request that its control of the bus be locked over a sequence of related bus transactions. For example, in the context of an AMBA AHB bus application, an AHB master device coupled to an AHB bus generates and HLOCK signal propagated onto its AHB bus as an HMASTLOCK signal when the arbiter of the particular AHB bus grants access to the requesting master device. The AHB arbiter on a particular AHB bus must allow a master device asserting the HLOCK signal to maintain ownership of the bus after exclusive ownership has been granted even when the master device is issuing idle transactions (i.e., no present data transaction for the bus).
The present specifications of such buses address the locking of a single bus by a master device on that bus. When multiple buses are attached to corresponding ports of a shared multiported device, there is no mechanism presently known which preserves the intent of such a lock signal of each of the multiple buses when arbitrating among the ports of the multiported device to process commands issued by master devices on each of the multiple buses.
It is evident from the above discussion that a need exists for an improved architecture for preserving the semantic intent of a locked sequence of bus transactions directed to a multiported device with multiple buses each coupled to a port of the multiported device.